INSTRUMENTS AND AVIONICS
IP Cores
IP CORES
SITAEL microelectronics library includes a certain number of digital IPs for rad-hard FPGAs, available to customers for use on their products and systems, under specific license agreements. SITAEL IP cores are provided with source code (VHDL or synthesized VHDL), simulation / synthesis / compilation scripts, testbench, and documentation (User Manual/Datasheet). Our aftersales service aids our customers through the provision of extensive maintenance and support.
| V8uC | Microcontroller for low-end space applications based on SPARC V8 architecture, powerful replacement for ATMEL 80C52 microcontroller (now in phase-out) |
| CANopen | CANopen Controller. Complete CAN node capable to handle both low level communication aspects and the higher level Object dictionary memory management aspects |
| IMMIPC | Improved Memory Module IP Core to mitigate the radiation effects caused by heavy ions, neutrons and protons impact on a COTS based mass memory modules, making use of digital techniques |
| DSPACE | High performance, scalable, multi-purpose DSP for space application up to 1 GFLOPS, conceived to be used both as stand-alone signal processor into embedded systems and as building component for computational capability increasing |
| PCI | Master/Slave PCI IP core with DMA access |
| PCI light | Slave access on one side, memory-like access on the other side |
| AMBA to PCI | Bridge joining a PCI bus with an AMBA AHB bus |
| I2C | Fully supports 8-bit, bi-directional, serial data transfers. Master/Slave Modes. True multi-master bus operation capability including collision detection and arbitration to prevent data corruption |
| Floating Point Unit | IEEE 754 single precision floating point including Sum, Compare, Multiply, Divide, Floating Point to/from Integer conversion, unary operators negation and absolute value |
| Am-CAN | 80C51 Microcontroller with internal RAM and SFR, Interrupt Controller, UART Controller, LIN Controller, 3PWMs/Timers, General Purpose I/Os, In Circuit Emulator and CAN Controller 2.0B with 16 Mboxes (all in/out configurable) |
| UART/LIN | Able to transmit and receive (in full-duplex mode) both using UART or LIN protocol. LIN master or slave. TX/RX clocks generation using sytem clock or external clock |
| RMAP Receiver | Designed to operate with different Space Wire codecs into a larger SpW RMAP module |
